IC substrate high-temperature coefficient of thermal expansion (CTE) testing measures the dimensional stability of package substrates under elevated temperature conditions, a critical parameter for flip-chip, BGA, and high-density packaging reliability. Accurate CTE data below and above the glass transition temperature enables engineers to predict warpage, solder joint stress, and delamination risk. This article provides a comprehensive overview of testing samples, testing items, measurement methods, industry standards, and typical applications.
Technical Overview
The IC substrate (package substrate) serves as the electrical and mechanical interconnection bridge between the silicon die and the printed circuit board. Because the substrate is directly coupled to the silicon chip, whose CTE is approximately 2.6–3.0 ppm/°C, any mismatch in thermal expansion generates significant thermomechanical stress during reflow soldering, thermal cycling, and long-term operation. High-temperature CTE testing therefore evaluates how much the substrate expands or contracts as temperature rises, typically from room temperature up to 260°C or 300°C.
Thermomechanical analysis (TMA) is the industry-standard technique for this measurement. The test captures two critical expansion coefficients: the linear CTE below the glass transition temperature (alpha 1) and the CTE above Tg (alpha 2), where polymeric materials soften and expand at a markedly higher rate. For advanced substrates used in flip-chip ball grid array (FCBGA) packages, typical in-plane CTE targets fall between 10 and 17 ppm/°C to remain compatible with the silicon die, copper pads, and molding compounds. Exceeding these limits can result in corner solder ball cracking, underfill delamination, and package warpage beyond assembly tolerance.
Testing is generally performed in accordance with recognized standards such as IPC-TM-650 Method 2.4.24, IPC-TM-650 Method 2.4.24.1, ASTM E831, and related material qualification specifications required by semiconductor packaging customers.
Testing Samples
BT Resin Substrates
Bismaleimide triazine (BT) resin substrates reinforced with glass fabric are widely used for memory, RF, and lead-frame-free packages such as BGA and CSP. Their in-plane CTE typically ranges from 10 to 15 ppm/°C. Samples are usually cut from production panels in both machine and transverse directions to evaluate material anisotropy.
ABF Build-up Substrates
Ajinomoto Build-up Film (ABF) and similar epoxy-based dielectric build-up layers are the dominant materials for fine-pitch FCBGA substrates. The build-up layers exhibit a relatively low elastic modulus and a noticeably higher z-axis CTE, making both in-plane and through-thickness expansion characterization essential for warpage modeling.
Epoxy and Glass-Fabric Core Substrates
FR-4-like epoxy cores with low-CTE glass cloth are used as the rigid center layer of many package substrates. Testing verifies that the core CTE, typically 12–16 ppm/°C in-plane, meets the specification after lamination and copper pattern etching.
Flexible and Rigid-Flex Substrates
Polyimide-based flexible substrates display CTE behavior strongly dependent on film orientation and adhesive layers. Testing covers base films, coverlays, and completed multilayer constructions to support chip-on-film and flex-based SiP applications.
Finished Multilayer Substrate Coupons
In addition to raw laminate materials, test coupons extracted from finished substrate panels with full copper distribution, vias, and solder mask are tested to reflect real product behavior, since copper density and circuit geometry measurably influence effective CTE.
Testing Items
A complete high-temperature CTE characterization program for IC substrates typically includes the following items:
- In-plane CTE (X and Y directions) below the glass transition temperature, reported as alpha 1 in ppm/°C.
- In-plane CTE (X and Y directions) above the glass transition temperature, reported as alpha 2 in ppm/°C.
- Through-thickness (z-axis) CTE, which governs via reliability and interlayer delamination behavior.
- Glass transition temperature (Tg) determined from the inflection point of the expansion curve.
- Total dimensional change over the full temperature range, such as delta L from 30°C to 260°C.
- Expansion behavior across simulated reflow peaks up to 260°C or 300°C to assess worst-case conditions.
- Anisotropy comparison between machine direction and transverse direction samples.
Testing Methods
The primary method is Thermomechanical Analysis (TMA) in expansion mode, performed under the framework of IPC-TM-650 2.4.24 and ASTM E831. The general procedure is as follows:
- Sample preparation: coupons are cut to dimensions typically between 3 mm and 6 mm square or circular, with a flat, parallel top and bottom surface. Recommended thickness is between 0.3 mm and 2 mm for z-axis measurements.
- Pre-conditioning: samples are baked (for example, 105°C for 1 to 2 hours or per specification) to eliminate moisture, which can otherwise distort the expansion curve and depress the apparent Tg.
- Measurement: the specimen is placed on the quartz platform with a light-force expansion probe. The furnace ramps at a controlled heating rate, commonly 5°C/min or 10°C/min, from room temperature to the target endpoint of 260°C, 280°C, or 300°C under nitrogen purge.
- Data reduction: CTE is calculated from the slope of the dimensional change versus temperature curve. The linear segment below Tg defines alpha 1, the segment above Tg defines alpha 2, and the intersection of the two tangent lines yields the Tg value.
- Verification: after the first heating run, a second run is frequently performed to distinguish intrinsic material behavior from irreversible effects such as residual stress relaxation and post-curing.
For in-plane CTE at higher precision, supplementary methods may be employed, including horizontal-dilatometer testing, thermal strain gauge techniques, or interferometric dimension measurement on larger coupons. Results are reported with measurement uncertainty, sample orientation, thermal history, and heating rate to ensure traceability and comparability between laboratories.
Applications
High-temperature CTE test data for IC substrates directly supports multiple engineering and quality functions across the semiconductor packaging supply chain:
- Package warpage simulation: CTE values from 25°C to 260°C are the key material input for finite element models that predict package flatness during SMT reflow.
- Solder joint reliability assessment: mismatch data between substrate, die, underfill, and board are used to estimate thermal cycling life and identify fatigue-critical locations.
- Material qualification and incoming inspection: substrate suppliers and OSATs use CTE specifications as lot acceptance criteria.
- New product development: CTE data guide the selection of low-CTE cores, build-up films, and copper balance strategies for FCBGA, 2.5D interposers, chiplet, and SiP designs.
- Failure analysis: comparing CTE curves from failed units against control lots helps identify under-cured resin, moisture uptake, or material substitution issues.
- Process optimization: evaluating CTE before and after lamination cycles, desmear, and multiple reflow exposures validates thermal process windows.
FAQ
What temperature range is used for IC substrate high-temperature CTE testing?
Testing typically runs from room temperature to 260°C, which corresponds to the peak reflow temperature of lead-free assembly. For more demanding applications or research purposes, the range may extend to 280°C or 300°C to capture the full alpha 2 region.
What is the difference between alpha 1 and alpha 2?
Alpha 1 is the linear CTE below the glass transition temperature, representing the rigid, glassy state of the resin system, typically 10–17 ppm/°C in-plane for IC substrates. Alpha 2 is the CTE above Tg, where the polymer softens and expands considerably faster, often two to five times higher than alpha 1.
Why is z-axis CTE so important for IC substrates?
High z-axis expansion stresses plated through-holes and microvias during thermal cycling, driving copper cracking, via separation, and interfacial delamination. Controlling z-CTE is essential for build-up substrates with high via densities.
How are samples oriented for testing?
Coupons are prepared in both the machine direction and the transverse direction of the laminate panel, because glass-fabric reinforcement creates measurable anisotropy between the X and Y axes.
What accuracy can be expected from TMA CTE measurements?
With proper calibration using certified reference materials such as aluminum or borosilicate standards, modern TMA instruments achieve CTE repeatability within approximately plus or minus 0.5 ppm/°C and dimensional change resolution below 100 nanometers.
How long does a typical test take?
A single TMA run, including preconditioning and a heating ramp at 5°C/min to 300°C, generally takes 60 to 90 minutes per sample. Complete characterization of a material set in multiple orientations and directions usually requires one to two working days.
